OpenAI Releases MRC Networking Protocol

The core insight behind MRC is that frontier AI training violates the assumption underneath the entire modern internet. Conventional networking gets its statistical magic from the law of large numbers: millions of independent flows, averaged across paths, smooth out into something predictable. Synchronous training on tens of thousands of GPUs is the opposite shape — every GPU is waiting on every other GPU at every step, so a single late transfer stalls the whole training step and leaves the rest of the cluster idle. With networks now containing millions of optical links, something is always failing somewhere, and a conventional RDMA flow pinned to a single path stalls for seconds when its link or switch goes down.

MRC's answer is to spray each transfer across hundreds of network paths simultaneously, baked into 800Gb/s NICs so the spraying happens at hardware speed. When a link or switch fails, MRC reroutes around it on a microsecond timescale rather than the seconds-to-tens-of-seconds typical of conventional fabrics — fast enough that the GPUs above never notice. OpenAI says the production proof was unceremonious: engineers rebooted four tier-1 switches during a frontier training run without coordinating with the training team, and MRC absorbed the disruption. That is a different posture toward failure than networking has historically taken, and as Ron Westfall puts it, it amounts to 'treating the entire AI fabric as a single fluid system instead of a series of isolated connections.'

It is not common to see AMD, Broadcom, Intel, Microsoft, NVIDIA, and OpenAI line up behind a single specification on the same day, contributed under an open license to the Open Compute Project. These are companies that compete on GPUs, on NICs, on switching silicon, and increasingly on cloud capacity itself. The fact that they all chose to co-launch — with simultaneous blog posts from each vendor and Sachin Katti openly crediting NVIDIA for co-engineering Blackwell-generation deployment — is a signal in itself.

The motivation, in OpenAI's own framing, is defensive. Greg Steinbrecher says several hyperscalers were already building closed, in-house RDMA transports, and that 'type of market fragmentation is bad for the networking industry.' The community reaction so far has tracked that strategic logic: the OpenAI Podcast episode with Mark Handley and Greg Steinbrecher has been the dominant discussion vector, framing MRC as removing 'one of the key barriers to continuing to scale,' while investor-leaning commentary has read the multi-vendor backing as a tide that floats AMD, Broadcom, Microsoft, and NVIDIA at once. The bet is that publishing the spec via OCP — rather than letting each hyperscaler ship its own private transport — keeps the long tail of NIC and switch vendors targeting the same protocol surface, and prevents AI back-end networking from balkanizing the way storage networking did a generation ago.

MRC arrives at a specific moment in the AI fabric debate. Dell'Oro tracks Ethernet sales to AI back-end networks surpassing InfiniBand in 2025, with hyperscalers pushing cluster sizes toward 100,000 and 500,000-plus GPUs. The strategic question for the industry has been whether Ethernet can credibly host RDMA-class transport at that scale, or whether AI customers would have to keep paying the InfiniBand tax to get the latency and loss behavior they need.

MRC's design is an Ethernet-native answer. It extends RoCE — the IBTA's RDMA-over-Ethernet standard — and layers on multipath transport plus SRv6 source routing borrowed from the Ultra Ethernet Consortium playbook. Just as importantly, its multi-plane topology lets a 100,000-plus GPU cluster be wired with two tiers of switches instead of the three or four tiers a conventional 800Gb/s network would need, which translates directly into fewer switches, less optics, and lower power per GPU. AMD's Krishna Doddapaneni names the underlying claim plainly: 'As GPUs and CPUs continue to drive compute, the real bottleneck in scaling AI is the network.' MRC is the bet that the answer to that bottleneck is open Ethernet plus a smarter transport — not another generation of proprietary fabric.

The OCP contribution is being framed as a portability story, but at launch the production silicon picture is narrower than the press release suggests. NVIDIA describes MRC as in production on Spectrum-X — specifically the Spectrum-4 and Spectrum-5 generations — and OpenAI says its frontier training has run on hardware from NVIDIA and Broadcom. AMD and Intel are co-authors of the spec and named partners, but the visible deployments at the moment lean heavily on the NVIDIA and Broadcom stacks.

That gap is the live tension to watch. An open specification is only as portable as the second and third interoperable implementations that ship against it. If AMD's Pensando-style NICs and Intel's networking silicon land MRC implementations that interoperate cleanly with Spectrum-X and Broadcom Tomahawk, the OCP contribution will look like the moment AI back-end networking became a multi-vendor commodity layer. If instead MRC ends up de facto bound to one or two silicon families, it will look more like a co-marketed standard — open in license, narrow in practice. The protocol's two-year development effort, the production deployments at OCI Abilene and Microsoft Fairwater, and the coordinated multi-vendor launch all argue for the optimistic read; the durability of that read depends on what ships next.